The Processing Technology Committee (PTC) is composed of three faculty, four students and postdocs (who serve for one year), one rotating specialist, safety manager, and is chaired by the associate director of fab operations.
The PTC meets weekly to review and approve new processes as well as all 24-hr status requests.
>>Submit your process for review.
Gold-bearing samples
The Technology Research Lab (TRL) and some tools in the Integrated Circuits Lab (ICL), allow processing of CMOS-compatible (VLSI, MEMS) as well as devices on III-V and other materials that may contain or have been exposed to Au, Fe & other metals that will create deep levels in Si.
For convenience, these samples (wafers and pieces) and machines are referred to as “Au-bearing” and are labeled with red tape. CMOS-compatible samples and tools are labeled with green tape. Samples in the Exploratory Materials Lab (EML) are not labeled as green or red, since none of them can be transferred into ICL or TRL.
The more flexible process capabilities may lead to a greater probability of processing-induced variation and cross-contamination, so maintaining strict segregation of red and green samples is critical. In addition to metals, there are other sources of contamination (eg, K, Na), so when processing a sample, follow the color-coded scheme created for distinguishing different levels of contamination.